XilMezzie - Introduction
I bought a Xilinx Spartan 3E development kit about 10 months ago, and I've been pottering around with a couple of projects. However, it got to the point where I needed a logic analyser to identify problems with one of the projects (which interfaces to the Xilinx), and the HP1640 I've borrowed from a friend of mine doesn't do what I want it to do.
I'd mocked up the logic analyser using the dev kit, but decided that I really need to make it as a stand-alone unit.
While working out what device I should use, and also laying out the PCB, I had an idea - make a general purpose card which could be re-used in other projects. This meant I would be able to make the other projects a lot simpler, and cheaper.
In order to make this board as useful as possible, I had a number of design goals:
- Provide as many I/O pins as possible
- Make it as small as possible
- Keep all common circuitry on the board (power, configuration, programming)
- Use a 0.1" pin spacing
- I need to manufacture it at home (for the initial prototypes at least)
I opted for the 100-pin variant of the Spartan 3E, and in order to get as much possible logic on, I've gone for the largest FPGA I could find in that size - the XC3S250E. You can get the XC3S500E (basically twice the amount of logic), but I've not found a good source for one-offs (I've found a source for 90-offs).
I already had 4 of these for the original project I was working on (although only one would be used), so it made sense to keep it (I did look at the smaller XC3S50A for the logic analyser).
Power would be provided by a single 3.3V supply; the XC3S250E requires a 1.2V and 2.5V for the internal and auxillary supplies respectively, so I needed some small voltage regulators. The LD1117 range have 1.2V and 2.5V regulators, so coupled with a 22µF capacitor, they would be ideal.
I've got a Xilinx Platform Cable USB II JTAG programmer - that uses a 14-pin 2mm connector. I'd already designed this as a package, so it was a bit of a no-brainer. The XC3S50A had a bit of an odd arrangement for the JTAG pins (it would've suited 6 more randomly placed pins), but the XC3S250E is much better (only one of the JTAG pins is a distance away from the other).
Since the Xilinx ISE tool allows indirect SPI programming, I also added an SPI configuration for permanent programming (i.e. without relying on the JTAG to reprogram after each power cycle). For this, I used the Atmel AT45DB021D for storage.
The development kit has a 50MHz clock, and when combined with the DCM (Digital Clock Manager), that should be all that is necessary. Just in case, though, it should be possible to allow other clocks to be fed into some of the I/O pins.
The development kit has an LED coming off the DONE pin, and also a push-switch for the PROGB to allow it to re-take the program from the SPI memory. These would be nice to have.
Also, a reset signal would be useful, driven off the main 3.3V supply.